Abstract
We present in
this paper custom building blocks for a visual cortical implantable stimulator.
Voltages are kept low throughout the power chain, from rectification to
stimulation stages, which is possible via dynamic monopolar stimulation. To
minimize power losses in regulators, a high efficiency 2/3 switched capacitors
DC/DC converter is used, in conjunction with a feedback loop controlling the
wirelessly transmitted power. The continuous feedback loop is possible through
Phase Shift Keying downlink demodulation, performed by a differential
hard-limited Costas loop. Experimental results from integrated circuits are
presented.
1.
INTRODUCTION
Electrical
microstimulation of the visual cortex is a promising approach for providing a
number of totally blind subjects with functional vision. Although published
results today cannot specify the exact requirements for such a prosthesis,
hundreds of electrodes are expected to be required [1], each individually
stimulating at rates at or above 100 Hz. High parallelism, and proper data
encoding make this goal achievable with today’s technology and know-how, with
respect primarily to data throughput at reasonable carrier frequencies (< 20
MHz) [2-3].
On the other
hand, no effort shall be minimized for reducing power consumption of such massively
parallel stimulators. Prohibitively large power dissipation results in tissue
heating and battery drain, to be particularly avoided for practically
continuously used devices, as the targeted visual implant.
Different key
components of an implant have been designed with power consumption in mind. In
this paper, we present the overall architecture of the targeted implant, and
describe the main circuits having a direct effect on power efficiency of the
device. The main experimental results are presented, before concluding.
2. METHODS
The system being designed by our team consists of an external controller
which drives a multi-module implant through an inductive link. The implant is
comprised of an interface module for power recovery and data transmission, and
several stimulation modules disposed on top of microelectrode arrays
penetrating in the primary visual cortex.
Because the location and size of the interface module is not critically
constrained, discrete components are used and enable a high efficiency Switched
Capacitor (SC) DC/DC converter to reduce power losses in the regulation stage.
Efficiency is further enhanced in this stage by a feedback loop controlling the
input voltage such that it stays low in varying conditions. For the loop to be
stable, a full-duplex data link must be implemented. Constant amplitude
downlink (external to internal) modulation is used to enable reliable Load
Shift Keying (LSK) uplink (internal to external). Finally, the supply voltage
can also be kept low by using dynamic monopolar stimulation, minimizing current
path impedance while allowing each stimulation pulse to swing from one rail to
the other.
2.1 Power
recovery
Power recovery
and regulation play a crucial role in the efficiency of the complete
implantable system. Although popular mainly for their small size and low noise,
linear regulators suffer from poor efficiency when their drop-out voltage is
large, such as for REGL in the dual voltage configuration of Figure
1(a), where VL < VH. Drop-out through
regulators can be reduced by two approaches using high efficiency DC/DC
converters. The first (step-up, b) is to target the rectified voltage, VREC,
to be close to the lower regulated voltage, then convert it to a value slightly
above VH. The second (step-down, c) is to convert a VREC
slightly above VH to a voltage close to VL.
Figure 1: Dual voltage regulation schemes.
To compare the step-up and step-down efficiencies, one must not only
consider the power losses in the regulation stage and its load, but also importantly
in the rectifying circuit, determined by the implant total input current, Iin. The latter can be
approximated for the three configurations of Figure 1 by:
|
Linear Regulators only : Iin = IL + IH |
(1) |
|
Lin. Regs w DC/DC step-up : Iin = IL + k/h IH |
(2) |
|
Lin. Regs w DC/DC step-dn : Iin = k/h IL + IH |
(3) |
where k and h are
the DC/DC converter Vout/Vin, and efficiency,
respectively. From this, one can see that not only step-down reduces drop-out
of one linear regulator given that k
< h, but also reduces the input current (k < 1), hence reducing the power dissipated in the rectifying
element. Input current is instead increased in the case of the step-up
configuration (k > 1). This
further adversely affects the performance of the system when IH is larger than IL, which is typically the
case for a large electrode-count stimulator, where VH is used for stimulation, and VL for control circuitry.
The proposed regulation scheme therefore employs a step-down Switched
Capacitor (SC) DC/DC converter and two Low Drop-Out (LDO) linear regulators, as
shown in Figure 2.
Figure 2: VH and VL regulation with step-down
SC DC/DC conversion of the rectified input.
The linear regulators employ N-type pass devices (M1, M2)
for lower resistivity and higher stability than their P-type counterpart. The
use of a native M1 transistor (Vth
< 0), results in low drop-out capability without the need for boosting the
output of Amp1.
Note that stability of the output voltages is closely related to that of VREF, so supplying the bandgap circuit with a regulated supply is preferred over the rectified input. This requires, however, a power up circuit ensuring that the circuit exits the stable state where VH = VL = 0 V. For this reason, we include an analog multiplexer that feeds the bandgap reference directly with VREC until VH has reached a threshold ensuring proper function of the regulator.
The key for high efficiency resides in controlling accurately the
emitted power such that VREC
is as close as possible to a target voltage only slightly above VH. This is achieved through
a negative feedback to the external power amplifier provided by a sigma-delta
Analog to Digital Converter (ADC) sampling continuously VREC, as shown in Figure 3. According to the sampled
value of VREC, the supply
voltage of the external class E power amplifier is modulated via a digitally
controlled switching regulator.
Figure 3: Transcutaneously emitted power control loop.
2.2 Data
transmission
The regulation
system presented above requires a full-duplex communication link for its
feedback loop. With a conventional uplink using LSK, and assuming a single
inductive coil is used for power and bi-directional data, this can only be
reliably achieved using constant amplitude modulation for the downlink. For
best efficiency of the inductive link, a tuned resonant receiver having a high Q factor is desirable, hence PSK is our
preferred implementation over FSK, which requires ultra wideband modulation
because of the high data rate/carrier frequency ratio needed in the case of a
visual stimulator.
Conventional PSK
demodulators regularly include analog or digital Costas Loops, the latter using
digital multiplication, filtering, phase shifting and digitally controlled
Phase Locked Loop (PLL). For reducing complexity and power consumption, we
propose a hard-limited Costas loop detailed in [4].
2.3 Stimulation
The larger part
of the power consumed by an implant having a large number of electrodes resides
in its stimulation output stage. It is then mandatory to use the lowest voltage
possible, while avoiding clipping the stimulation pulses, which would result in
imbalanced phases and ultimately in tissue damage.
Monopolar
stimulation is used to reduce the impedance of the stimulation current path
compared with a bipolar approach. A dynamically controlled return current
electrode voltage provides the output stage with the full supply voltage for
each stimulation pulse [5]. Hence both lowest impedance and highest voltage
swing at a given supply voltage are obtained. The voltage of the large size
return current electrode, located on the Interface Module, can be either
digitally controlled, or via a negative feedback driven by an appropriately
chosen stimulation site or a predefined reference path.
3. RESULTS
The main building
blocks of the implant have been implemented in standard CMOS 0.18 mm technology and
successfully tested. Supply voltages are VH
= 3.3 V, VL = 1.8 V, while
DC/DC conversion is set to 2/3 using 3 discrete 300 nF capacitors. The SC
DC/DC converter efficiency was measured to be greater than 89% when VREC > 2.5 V and ILoad = 5 mA, with a
switching frequency of 500 kHz. The external power amplifier control loop was
implemented and measurement results seen in Figure 4 show that amplitude of the
received carrier is maintained constant under loads of 5, 10 and 15 mA. To
date, simulations have indicated that the achievable data rate of the proposed
BPSK demodulator is 1.12 Mbps with a 13.56 MHz carrier, and power consumption
is only 500 mW. Finally, Table
I compares the maximum current allowed
before clipping occurs during bipolar pulses of similar duration (approx. 100
μs) in physiological solution to conventional monopolar and bipolar
approaches.
Table
I
Max Charge/Phase For 100ms Time Limited Pulses
|
|
Bipol. |
Monopol. |
Dyn. Mono. |
|
I Max (μA) |
17.5 |
26.5 |
70 |
|
Q/phMax (pC) |
1
750 |
2
703 |
6
370 |
a)
b)
Figure 4: VREC voltage (lower trace) during 5, 10 and 15 mA load current steps (higher trace) (a) without and (b) with power amplifier control loop. VREC sampling freq. = 10 kSps, target VREC = 3.7 V.
4. CONCLUSION
In an effort to
make a future visual cortical prosthesis really safe and practical, building
blocks maximizing power efficiency by keeping voltages and impedances low in
its main current paths are proposed. This is achieved in part by dynamic
control of the transmitted power through a full-duplex data link. Additionally,
a high efficiency step-down DC/DC converter is used where power would be
dissipated in a significant voltage drop otherwise.
References
[1] Cha
K, Horch K, Normann RA. Simulation of a phosphene based visual field: visual
acuity in a pixelized vision system. Ann. Biomed.
[2] Coulombe J, Gervais JF, Sawan M. A Cortical Stimulator With Monitoring Capabilities Using a Novel 1 Mbps ASK Data Link. ISCAS, Sydney Australia, 2004.
[3] Ghovanloo M, Najafi K. A Modular 32-site wireless neural stimulation microsystem. IEEE JSSC, 39:12, 2457 – 2466, 2004.
[4] Hu Y, Sawan
M. A Fully-Integrated Low-Power BPSK Wireless Inductive Link for Implantable
Medical Devices. MWSCAS,
[5] Coulombe J, Carniguian S, Sawan M. A Power Efficient Electronic Implant for a Visual Prosthesis. Artif. Organs, 29:3, 233-238, 2005.
Acknowledgements
The authors thank the CMC for fabrication support, as well as the NSERC of Canada and Institut Nazareth et Louis Braille for financial support.